EFFECTIVE DYNAMIC RE-MAPPING ALGORITHM FOR LOW POWER NETWORK- ON-CHIP NOC.
Abstract:
The increasing complexity and scale of System-on-Chip (SoC) designs have led to the widespread adoption of Network-on-Chip (NoC) architectures as a means of interconnecting various functional blocks. However, the growing demand for energy-efficient computing necessitates the development of novel techniques to reduce power consumption in NoCs. This abstract presents an effective dynamic re-mapping algorithm designed to minimize power consumption in low power NoCs.
The proposed algorithm focuses on dynamically re-mapping the communication routes between processing elements (PEs) in the NoC, based on the current workload and power consumption patterns. By considering the application characteristics and traffic patterns, the algorithm intelligently redistributes the communication traffic to minimize wirelength, reduce contention, and ultimately lower power consumption.
The algorithm employs a two-step approach to achieve efficient re-mapping. In the first step, it utilizes workload profiling techniques to characterize the communication patterns and identify bottlenecks in the existing mapping. This step enables the algorithm to identify heavily utilized routes and potential areas for optimization. In the second step, a re-mapping strategy is employed to dynamically reconfigure the routing paths, taking into account the workload characteristics, power consumption constraints, and communication requirements.
To evaluate the effectiveness of the proposed algorithm, extensive simulations are conducted using representative benchmark applications. The results demonstrate that the algorithm achieves significant reductions in power consumption while maintaining acceptable levels of performance in terms of latency and throughput. Furthermore, the algorithm adapts to workload variations, enabling it to continuously optimize the mapping in real-time, ensuring efficient power management in the NoC.
In conclusion, this abstract presents an effective dynamic re-mapping algorithm for low power Network-on-Chip architectures. By leveraging workload profiling and intelligent re-mapping strategies, the algorithm optimizes power consumption by dynamically redistributing communication traffic in the NoC. The algorithm’s ability to adapt to workload variations and achieve substantial power savings makes it a promising solution for energy-efficient on-chip communication in complex SoC designs.
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